Relevant Experience from R&D through Production Ramp

Silicon Process Nodes

  • 28nm – 1um CMOS
  • 130nm – 0.7um; 18V – 700V Power BCD
  • 180nm Capacitive Isolation
  • FeRAM (embedded Ferroelectric Memory)
  • High k/Metal gate; Recessed Source-Drain; Ultralow k dielectrics; plasma nitride gate
  • Metrology Pattern Recognition Structures
  • Design Rules & PDK

Wide Bandgap Processes

  • GaN 650V
  • SiC 900-1200V

Silicon Wafers

  • Crystal growth; realtime control; SPC
  • Defect control and product correlation
  • Purchase specification for variety of silicon nodes

Packaging & Interconnect

  • 3um Thick Aluminum, Damascene Copper top level interconnect for Power
  • System in Package power QFN
  • HotRod wireless QFN (copper post)
  • High voltage and Isolation packaging, including LGA, QFN, and SOIC
  • Integrated isolated transformer
  • Leadframe design and manufacturing specification

Control, Manufacturing & Fab Operation

  • Advanced Process Control, including software (ProcessWORKS), for fab and A/T
  • Equipment tracking, OEE (TrackWORKS)
  • Manufacturing Execution Systems (WORKS)
  • Statistical Process Control (SPC)
  • Fault Detection and Classification, including sensor signal trace analysis
  • 300mm fab design and build (the process representative for RFAB)
  • Equipment specification, bid, order, install, and production release
  • Fab and line start-up

Metrology

  • Scatterometry, XPS, ellipsometry for ultrathin gate dielectrics
  • Wafer, in-line, WAT, Final Test for high voltage, isolation, leading edge CMOS
  • Die ID and Leadframe Strip ID
  • In-situ sensors like RF, optical, mass spectrometry, temperature

Materials & precursors

  • Purchase specifications
  • Batch acceptance criteria
  • Joint development programs

New Product Development & Release

  • Control and MES systems
  • Metrology and sensors
  • High voltage, isolation, GaN, Power SiP, DCDC products
  • Design for test/reliability/mfg/other (DFx) and BIST for digital and analog

Joint Development Programs, Consortia, & Universities

  • Process and Metrology Equipment projects
  • Consortia advisory board leadership (SEMATECH, IMEC, SRC, PowerAmerica)
  • University project definition and portfolio management

Standards

  • Past Chair and co-founder of JEDEC’s JC-70 Committee for Wide Bandgap Power Electronic Conversion Semiconductors
  • Current founder and Co-convenor of IEC’s new TC47/WG8: Wide bandgap technologies
  • Past internal company coordinator for standards participation

Business Processes developed & institutionalized

  • Automotive product development and release process
  • Research and early development business processes
  • Analog New Product Development Execution business process and steering team
  • Advanced Control business process for development and release to manufacturing
  • Equipment development/joint equipment development business process
  • Transition of R&D from 200mm into an existing production 300mm
  • Capital business process for R&D equipment
  • Node and major R&D project approval, including financials, timelines, headcount